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Computer Aided Verification

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Cover of 'Computer Aided Verification'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 Synthesis and Some of Its Challenges
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    Chapter 2 Model Checking Cell Biology
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    Chapter 3 Synthesizing Programs with Constraint Solvers
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    Chapter 4 IC3 and beyond: Incremental, Inductive Verification
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    Chapter 5 Formal Verification of Genetic Circuits
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    Chapter 6 From C to Infinity and Back: Unbounded Auto-active Verification with VCC
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    Chapter 7 Deterministic Automata for the (F,G)-Fragment of LTL
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    Chapter 8 Efficient Controller Synthesis for Consumption Games with Multiple Resource Types
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    Chapter 9 ACTL ∩ LTL Synthesis
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    Chapter 10 Learning Boolean Functions Incrementally
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    Chapter 11 Interpolants as Classifiers
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    Chapter 12 Termination Analysis with Algorithmic Learning
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    Chapter 13 Automated Termination Proofs for Java Programs with Cyclic Data
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    Chapter 14 Proving Termination of Probabilistic Programs Using Patterns
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    Chapter 15 The Gauge Domain: Scalable Analysis of Linear Inequality Invariants
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    Chapter 16 Diagnosing Abstraction Failure for Separation Logic–Based Analyses
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    Chapter 17 A Method for Symbolic Computation of Abstract Operations
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    Chapter 18 Leveraging Interpolant Strength in Model Checking
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    Chapter 19 Detecting Fair Non-termination in Multithreaded Programs
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    Chapter 20 Lock Removal for Concurrent Trace Programs
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    Chapter 21 Computer Aided Verification
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    Chapter 22 Synchronisation- and Reversal-Bounded Analysis of Multithreaded Programs with Counters
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    Chapter 23 Software Model Checking via IC3
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    Chapter 24 Computer Aided Verification
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    Chapter 25 Assume-Guarantee Abstraction Refinement for Probabilistic Systems
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    Chapter 25 Assume-Guarantee Abstraction Refinement for Probabilistic Systems
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    Chapter 26 Cross-Entropy Optimisation of Importance Sampling Parameters for Statistical Model Checking
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    Chapter 27 Timed Relational Abstractions for Sampled Data Control Systems
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    Chapter 28 Approximately Bisimilar Symbolic Models for Digital Control Systems
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    Chapter 29 Formal Verification and Validation of ERTMS Industrial Railway Train Spacing System
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    Chapter 30 Minimum Satisfying Assignments for SMT
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    Chapter 31 When Boolean Satisfiability Meets Gaussian Elimination in a Simplex Way
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    Chapter 32 A Solver for Reachability Modulo Theories
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    Chapter 33 On Decidability of Prebisimulation for Timed Automata
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    Chapter 34 Exercises in Nonstandard Static Analysis of Hybrid Systems
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    Chapter 35 A Box-Based Distance between Regions for Guiding the Reachability Analysis of SpaceEx
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    Chapter 36 An Axiomatic Memory Model for POWER Multiprocessors
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    Chapter 37 nuTAB-BackSpace: Rewriting to Normalize Non-determinism in Post-silicon Debug Traces
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    Chapter 38 Incremental, Inductive CTL Model Checking
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    Chapter 39 Efficient Runtime Policy Enforcement Using Counterexample-Guided Abstraction Refinement
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    Chapter 40 Automatic Quantification of Cache Side-Channels
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    Chapter 41 Secure Programming via Visibly Pushdown Safety Games
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    Chapter 42 Alternate and Learn: Finding Witnesses without Looking All over
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    Chapter 43 A Complete Method for Symmetry Reduction in Safety Verification
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    Chapter 44 Synthesizing Number Transformations from Input-Output Examples
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    Chapter 45 Acacia+, a Tool for LTL Synthesis
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    Chapter 46 MGSyn: Automatic Synthesis for Industrial Automation
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    Chapter 47 OpenNWA: A Nested-Word Automaton Library
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    Chapter 48 Ufo: A Framework for Abstraction- and Interpolation-Based Software Verification
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    Chapter 49 SAFARI: SMT-Based Abstraction for Arrays with Interpolants
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    Chapter 50 Computer Aided Verification
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    Chapter 51 APEX: An Analyzer for Open Probabilistic Programs
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    Chapter 52 Recent Developments in FDR
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    Chapter 53 A Model Checker for Hierarchical Probabilistic Real-Time Systems
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    Chapter 54 SYMDIFF: A Language-Agnostic Semantic Diff Tool for Imperative Programs
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    Chapter 55 Cubicle: A Parallel SMT-Based Model Checker for Parameterized Systems
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    Chapter 56 HybridSAL Relational Abstracter
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    Chapter 57 Euler: A System for Numerical Optimization of Programs
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    Chapter 58 SPT: Storyboard Programming Tool
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    Chapter 59 CSolve: Verifying C with Liquid Types
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    Chapter 60 passert: A Tool for Debugging Parallel Programs
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    Chapter 61 TRACER: A Symbolic Execution Tool for Verification
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    Chapter 62 Joogie: Infeasible Code Detection for Java
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    Chapter 63 Hector: An Equivalence Checker for a Higher-Order Fragment of ML
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    Chapter 64 Resource Aware ML
Overall attention for this book and its chapters
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Title
Computer Aided Verification
Published by
Springer, Berlin, Heidelberg, January 2012
DOI 10.1007/978-3-642-31424-7
ISBNs
978-3-64-231423-0, 978-3-64-231424-7
Editors

P. Madhusudan, Sanjit A. Seshia

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Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 2 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Israel 1 50%
Unknown 1 50%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 1 50%
Professor > Associate Professor 1 50%
Readers by discipline Count As %
Materials Science 1 50%
Engineering 1 50%