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Computer Aided Verification

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Cover of 'Computer Aided Verification'

Table of Contents

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    Book Overview
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    Chapter 1 Software Documentation and the Verification Process
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    Chapter 2 Certifying Model Checkers
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    Chapter 3 Formalizing a JVML Verifier for Initialization in a Theorem Prover
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    Chapter 4 Automated Inductive Verification of Parameterized Protocols?
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    Chapter 5 Efficient Model Checking Via Büchi Tableau Automata?
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    Chapter 6 Fast LTL to Büchi Automata Translation
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    Chapter 7 A Practical Approach to Coverage in Model Checking
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    Chapter 8 A Fast Bisimulation Algorithm
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    Chapter 9 Symmetry and Reduced Symmetry in Model Checking?
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    Chapter 10 Transformation-Based Verification Using Generalized Retiming
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    Chapter 11 Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions
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    Chapter 12 CLEVER: Divide and Conquer Combinational Logic Equivalence VERification with False Negative Elimination
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    Chapter 13 Finite Instantiations in Equivalence Logic with Uninterpreted Functions
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    Chapter 14 Model Checking with Formula-Dependent Abstract Models
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    Chapter 15 Verifying Network Protocol Implementations by Symbolic Refinement Checking
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    Chapter 16 Automatic Abstraction for Verification of Timed Circuits and Systems?
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    Chapter 17 Automated Verification of a Randomized Distributed Consensus Protocol Using Cadence SMV and PRISM?
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    Chapter 18 Analysis of Recursive State Machines
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    Chapter 19 Parameterized Verification with Automatically Computed Inductive Assertions?
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    Chapter 20 EVC: A Validity Checker for the Logic of Equality with Uninterpreted Functions and Memories, Exploiting Positive Equality, and Conservative Transformations
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    Chapter 21 AGVI — Automatic Generation, Verification, and Implementation of Security Protocols
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    Chapter 22 ICS: Integrated Canonizer and Solver?
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    Chapter 23 µCRL: A Toolset for Analysing Algebraic Specifications
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    Chapter 24 Truth/SLC — A Parallel Verification Platform for Concurrent Systems
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    Chapter 25 The SLAM Toolkit
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    Chapter 26 Java Bytecode Verification: An Overview
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    Chapter 27 Iterating Transducers
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    Chapter 28 Attacking Symbolic State Explosion
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    Chapter 29 A Unifying Model Checking Approach for Safety Properties of Parameterized Systems
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    Chapter 30 A BDD-Based Model Checker for Recursive Programs
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    Chapter 31 Model Checking the World Wide Web?
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    Chapter 32 Distributed Symbolic Model Checking for μ-Calculus
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    Chapter 33 The Temporal Logic Sugar
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    Chapter 34 TReX: A Tool for Reachability Analysis of Complex Systems
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    Chapter 35 BOOSTER: Speeding Up RTL Property Checking of Digital Designs by Word-Level Abstraction
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    Chapter 36 SDLcheck: A Model Checking Tool
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    Chapter 37 EASN: Integrating ASN.1 and Model Checking
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    Chapter 38 Rtdt: A Front-End for Efficient Model Checking of Synchronous Timing Diagrams
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    Chapter 39 TAXYS: A Tool for the Development and Verification of Real-Time Embedded Systems?
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    Chapter 40 Microarchitecture Verification by Compositional Model Checking
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    Chapter 41 Rewriting for Symbolic Execution of State Machine Models
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    Chapter 42 Using Timestamping and History Variables to Verify Sequential Consistency
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    Chapter 43 Benefits of Bounded Model Checking at an Industrial Setting
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    Chapter 44 Finding Bugs in an Alpha Microprocessor Using Satisfiability Solvers
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    Chapter 45 Towards Efficient Verification of Arithmetic Algorithms over Galois Fields GF (2 m )
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    Chapter 46 Job-Shop Scheduling Using Timed Automata?
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    Chapter 47 As Cheap as Possible: Effcient Cost-Optimal Reachability for Priced Timed Automata
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    Chapter 48 Binary Reachability Analysis of Pushdown Timed Automata with Dense Clocks
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Title
Computer Aided Verification
Published by
Springer, Berlin, Heidelberg, January 2001
DOI 10.1007/3-540-44585-4
ISBNs
978-3-54-042345-4, 978-3-54-044585-2
Editors

Gérard Berry, Hubert Comon, Alain Finkel