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Field-Programmable Logic and Applications From FPGAs to Computing Paradigm

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Cover of 'Field-Programmable Logic and Applications From FPGAs to Computing Paradigm'

Table of Contents

  1. Altmetric Badge
    Book Overview
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    Chapter 1 New CAD framework extends simulation of dynamically reconfigurable logic
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    Chapter 2 Pebble: A language for parametrised and reconfigurable hardware design
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    Chapter 3 Integrated development environment for logic synthesis based on dynamically reconfigurable FPGAs
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    Chapter 4 Designing for Xilinx XC6200 FPGAs
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    Chapter 5 Perspectives of reconfigurable computing in research, industry and education
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    Chapter 6 Field-programmable logic: Catalyst for new computing paradigms
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    Chapter 7 Run-time management of dynamically reconfigurable designs
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    Chapter 8 Acceleration of satisfiability algorithms by reconfigurable hardware
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    Chapter 9 An optimized design flow for fast FPGA-based rapid prototyping
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    Chapter 10 A knowledge-based system for prototyping on FPGAs
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    Chapter 11 JVX — A rapid prototyping system based on Java and FPGAs
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    Chapter 12 Prototyping new ILP architectures using FPGAs
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    Chapter 13 CAD system for ASM and FSM synthesis
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    Chapter 14 Fast floorplanning for FPGAs
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    Chapter 15 SRAM-based FPGAs: A fault model for the configurable logic modules
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    Chapter 16 Reconfigurable hardware as shared resource in multipurpose computers
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    Chapter 17 Reconfigurable computer array: The bridge between high speed sensors and low speed computing
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    Chapter 18 A reconfigurable engine for real-time video processing
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    Chapter 19 An FPGA implementation of a magnetic bearing controller for mechatronic applications
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    Chapter 20 Exploiting contemporary memory techniques in reconfigurable accelerators
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    Chapter 21 Self modifying circuitry — A platform for tractable virtual circuitry
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    Chapter 22 REACT: Reactive environment for runtime reconfiguration
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    Chapter 23 Evaluation of the XC6200-series architecture for cryptographic applications
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    Chapter 24 An FPGA-based object recognition machine
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    Chapter 25 PCI-SCI protocol translations: Applying microprogramming concepts to FPGAs
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    Chapter 26 Instruction-level parallelism for reconfigurable computing
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    Chapter 27 A hardware/software co-design environment for reconfigurable logic systems
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    Chapter 28 Mapping loops onto reconfigurable architectures
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    Chapter 29 Speed optimization of the ALR circuit using an FPGA with embedded RAM: A design experience
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    Chapter 30 High-level synthesis for dynamically reconfigurable hardware/software systems
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    Chapter 31 Dynamic specialisation of XC6200 FPGAs by partial evaluation
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    Chapter 32 WebScope: A circuit debug tool
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    Chapter 33 Computing Goldbach partitions using pseudo-random bit generator operators on an FPGA systolic array
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    Chapter 34 Solving boolean satisfiability with dynamic hardware configurations
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    Chapter 35 Modular exponent realization on FPGAs
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    Chapter 36 Cost effective 2×2 inner product processors
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    Chapter 37 A field-programmable gate-array system for evolutionary computation
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    Chapter 38 A transmutable telecom system
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    Chapter 39 A survey of reconfigurable computing architectures
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    Chapter 40 A novel field programmable gate array architecture for high speed arithmetic processing
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    Chapter 41 Accelerating DTP with reconfigurable computing engines
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    Chapter 42 Hardware mapping of a parallel algorithm for matrix-vector multiplication overlapping communications and computations
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    Chapter 43 An interactive datasheet for the xilinx XC6200
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    Chapter 44 Fast adaptive image processing in FPGAs using stack filters
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    Chapter 45 Increasing microprocessor performance with tightly-coupled reconfigurable logic arrays
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    Chapter 46 A high-performance computing module for a low earth orbit satellite using reconfigurable logic
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    Chapter 47 Maestro-link: A high performance interconnect for PC cluster
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    Chapter 48 A hardware implementation of Constraint Satisfaction Problem based on new reconfigurante LSI architecture
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    Chapter 49 A hardware operating system for dynamic reconfiguration of FPGAs
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    Chapter 50 High speed low level image processing on FPGAs using distributed arithmetic
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    Chapter 51 A flexible implementation of high-performance FIR filters on Xilinx FPGAs
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    Chapter 52 Implementing processor arrays on FPGAs
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    Chapter 53 Reconfigurable hardware — A study in codesign
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    Chapter 54 Statechart-based HW/SW-codesign of a multi-FPGA-board and a microprocessor
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    Chapter 55 Simulation of ATM switches using dynamically reconfigurable FPGA's
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    Chapter 56 Fast prototyping using system emulators
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    Chapter 57 Space-efficient mapping of 2D-DCT onto dynamically configurable coarse-grained architectures
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    Chapter 58 XILINX4000 architecture — Driven synthesis for speed
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    Chapter 59 The PLD-implementation of Boolean function characterized by minimum delay
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    Chapter 60 Reconfigurable PCI-BUS interface (RPCI)
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    Chapter 61 Programmable prototyping system for image processing
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    Chapter 62 A co-simulation concept for an efficient analysis of complex logic designs
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    Chapter 63 Programming and implementation of reconfigurable routers
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    Chapter 64 Virtual instruments based on reconfigurable logic
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    Chapter 65 The >S<puter: Introducing a novel concept for dispatching instructions using reconfigurable hardware
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    Chapter 66 A 6200 model and editor based on object technology
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    Chapter 67 Interfacing hardware and software
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    Chapter 68 Generating layouts for self-implementing modules
Overall attention for this book and its chapters
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Title
Field-Programmable Logic and Applications From FPGAs to Computing Paradigm
Published by
Springer, Berlin, Heidelberg, January 1998
DOI 10.1007/bfb0055226
ISBNs
978-3-54-064948-9, 978-3-54-068066-6
Editors

Reiner W. Hartenstein, Andres Keevallik

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X Demographics

The data shown below were collected from the profiles of 12 X users who shared this research output. Click here to find out more about how the information was compiled.
Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 13 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Portugal 1 8%
China 1 8%
Unknown 11 85%

Demographic breakdown

Readers by professional status Count As %
Student > Bachelor 1 8%
Professor 1 8%
Student > Ph. D. Student 1 8%
Student > Master 1 8%
Researcher 1 8%
Other 1 8%
Unknown 7 54%
Readers by discipline Count As %
Engineering 4 31%
Computer Science 2 15%
Unknown 7 54%