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Computer Aided Verification

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Cover of 'Computer Aided Verification'

Table of Contents

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    Book Overview
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    Chapter 39 A determinizable class of timed automata
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    Chapter 40 Real-time system verification using P/T nets
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    Chapter 41 Criteria for the simple path property in timed automata
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    Chapter 42 Hierarchical representations of discrete functions, with application to model checking
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    Chapter 43 Symbolic verification with periodic sets
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    Chapter 44 Automatic verification of pipelined microprocessor control
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    Chapter 45 Using abstractions for the verification of linear hybrid systems
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    Chapter 46 Decidability of hybrid systems with rectangular differential inclusions
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    Chapter 47 Suspension automata: A decidable class of hybrid automata
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    Chapter 48 Verification of context-free timed systems using linear hybrid observers
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    Chapter 49 On the random walk method for protocol testing
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    Chapter 50 An automata-theoretic approach to branching-time model checking (Extended abstract)
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    Chapter 51 Realizability and synthesis of reactive modules
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    Chapter 52 Model checking of macro processes
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    Chapter 53 Methodology and system for practical formal verification of reactive hardware
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    Chapter 54 Modeling and verification of a real life protocol using symbolic model checking
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    Chapter 55 Verification of a distributed cache memory by using abstractions
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    Chapter 56 Beyond model checking
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    Chapter 57 Models whose checks don't explode
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    Chapter 58 On the automatic computation of network invariants
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    Chapter 59 Ground temporal logic: A logic for hardware verification
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    Chapter 60 A hybrid model for reasoning about composed hardware systems
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    Chapter 61 Composing symbolic trajectory evaluation results
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    Chapter 62 The completeness of a hardware inference system
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    Chapter 63 Efficient model checking by automated ordering of transition relation partitions
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    Chapter 64 The verification problem for safe replaceability
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    Chapter 65 Formula-dependent equivalence for compositional CTL model checking
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    Chapter 66 An improved algorithm for the evaluation of fixpoint expressions
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    Chapter 67 Incremental model checking in the modal mu-calculus
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    Chapter 68 Performance improvement of state space exploration by regular & differential hashing functions
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    Chapter 69 Combining partial order reductions with on-the-fly model-checking
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    Chapter 70 Improving language containment using fairness graphs
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    Chapter 71 A parallel algorithm for relational coarsest partition problems and its implementation
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    Chapter 72 Another look at LTL model checking
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    Chapter 73 The mobility workbench — A tool for the π -Calculus
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    Chapter 74 Compositional semantics of Esterel and verification by compositional reductions
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    Chapter 75 Model checking using adaptive state and data abstraction
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    Chapter 76 Automatic verification of timed circuits
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2 Wikipedia pages

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29 Mendeley
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Title
Computer Aided Verification
Published by
Springer Berlin Heidelberg, January 2006
DOI 10.1007/3-540-58179-0
ISBNs
978-3-54-058179-6, 978-3-54-048469-1
Editors

Dill, David L.

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 29 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 29 100%

Demographic breakdown

Readers by professional status Count As %
Student > Bachelor 1 3%
Unspecified 1 3%
Unknown 27 93%
Readers by discipline Count As %
Unspecified 1 3%
Biochemistry, Genetics and Molecular Biology 1 3%
Unknown 27 93%