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Transactions on High-Performance Embedded Architectures and Compilers I

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Cover of 'Transactions on High-Performance Embedded Architectures and Compilers I'

Table of Contents

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    Book Overview
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    Chapter 1 High Performance Processor Chips
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    Chapter 2 High-Performance Embedded Architecture and Compilation Roadmap
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    Chapter 3 Introduction to Part 1
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    Chapter 4 Quick and Practical Run-Time Evaluation of Multiple Program Optimizations
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    Chapter 5 Specializing Cache Structures for High Performance and Energy Conservation in Embedded Systems
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    Chapter 6 GCH: Hints for Triggering Garbage Collections
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    Chapter 7 Memory-Centric Security Architecture
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    Chapter 8 Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
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    Chapter 9 Introduction to Part 2
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    Chapter 10 Convergent Compilation Applied to Loop Unrolling
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    Chapter 11 Finding and Applying Loop Transformations for Generating Optimized FPGA Implementations
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    Chapter 12 Dynamic and On-Line Design Space Exploration for Reconfigurable Architectures
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    Chapter 13 Automatic Discovery of Coarse-Grained Parallelism in Media Applications
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    Chapter 14 An Approach for Enhancing Inter-processor Data Locality on Chip Multiprocessors
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    Chapter 15 Introduction to Part 3
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    Chapter 16 Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology
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    Chapter 17 Using Application Bisection Bandwidth to Guide Tile Size Selection for the Synchroscalar Tile-Based Architecture
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    Chapter 18 Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors
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    Chapter 19 Selective Code Compression Scheme for Embedded Systems
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    Chapter 20 A Prefetching Algorithm for Multi-speed Disks
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    Chapter 21 Reconfiguration Strategies for Environmentally Powered Devices: Theoretical Analysis and Experimental Validation
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Citations

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Title
Transactions on High-Performance Embedded Architectures and Compilers I
Published by
Lecture notes in computer science, January 2007
DOI 10.1007/978-3-540-71528-3
ISBNs
978-3-54-071527-6, 978-3-54-071528-3
Authors

Per Stenström, Fursin, Grigori, Cohen, Albert, O’Boyle, Michael, Temam, Olivier, O’Boyle, Mike, Bodin, François, Cintra, Marcelo, De Bosschere, Koen, Luk, Wayne, Martorell, Xavier, Navarro, Nacho, Pnevmatikatos, Dionisios, Ramirez, Alex, Sainrat, Pascal, Seznec, André, Stenström, Per

Editors

Stenström, Per

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 8 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 8 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 7 88%
Student > Postgraduate 1 13%
Readers by discipline Count As %
Computer Science 4 50%
Engineering 4 50%