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Correct Hardware Design and Verification Methods

Overview of attention for book
Cover of 'Correct Hardware Design and Verification Methods'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 View from the Fringe of the Fringe
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    Chapter 2 Hardware Synthesis Using SAFL and Application to Processor Design
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    Chapter 3 Applications of Hierarchical Verification in Model Checking
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    Chapter 4 Pruning Techniques for the SAT-Based Bounded Model Checking Problem
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    Chapter 5 Heuristics for Hierarchical Partitioning with Application to Model Checking
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    Chapter 6 Efficient Reachability Analysis and Refinement Checking of Timed Automata Using BDDs
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    Chapter 7 Deriving Real-Time Programs from Duration Calculus Specifications
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    Chapter 8 Reproducing Synchronization Bugs with Model Checking
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    Chapter 9 Formally-Based Design Evaluation
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    Chapter 10 Multiclock Esterel
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    Chapter 11 Register Transformations with Multiple Clock Domains
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    Chapter 12 Temporal Properties of Self-Timed Rings
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    Chapter 13 Coverability Analysis Using Symbolic Model Checking
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    Chapter 14 Correct Hardware Design and Verification Methods
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    Chapter 15 Formal Pipeline Design
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    Chapter 16 Verification of Basic Block Schedules Using RTL Transformations
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    Chapter 17 Parameterized Verification of the FLASH Cache Coherence Protocol by Compositional Model Checking
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    Chapter 18 Proof Engineering in the Large: Formal Verification of Pentium®4 Floating-Point Divider
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    Chapter 19 Towards Provably-Correct Hardware Compilation Tools Based on Pass Separation Techniques
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    Chapter 20 A Higher-Level Language for Hardware Synthesis
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    Chapter 21 Hierarchical Verification Using an MDG-HOL Hybrid Tool
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    Chapter 22 Exploiting Transition Locality in Automatic Verification
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    Chapter 23 Efficient Debugging in a Formal Verification Environment
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    Chapter 24 Using Combinatorial Optimization Methods for Quantification Scheduling
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    Chapter 25 Net Reductions for LTL Model-Checking
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    Chapter 26 Formal Verification of the VAMP Floating Point Unit
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    Chapter 27 A Specification Methodology by a Collection of Compact Properties as Applied to the Intel® Itanium™ Processor Bus Protocol
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    Chapter 28 The Design and Verification of a Sorter Core
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    Chapter 29 Refinement-Based Formal Verification of Asynchronous Wrappers for Independently Clocked Domains in Systems on Chip
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    Chapter 30 Using Abstract Specifications to Verify PowerPC™ Custom Memories by Symbolic Trajectory Evaluation
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    Chapter 31 Formal Verification of Conflict Detection Algorithms
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    Chapter 32 Induction-Oriented Formal Verification in Symmetric Interconnection Networks
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    Chapter 33 A Framework for Microprocessor Correctness Statements
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    Chapter 34 From Operational Semantics to Denotational Semantics for Verilog
  36. Altmetric Badge
    Chapter 35 Efficient Verification of a Class of Linear Hybrid Automata Using Linear Programming
Overall attention for this book and its chapters
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About this Attention Score

  • In the top 25% of all research outputs scored by Altmetric
  • High Attention Score compared to outputs of the same age (86th percentile)
  • High Attention Score compared to outputs of the same age and source (82nd percentile)

Mentioned by

patent
4 patents

Citations

dimensions_citation
2 Dimensions

Readers on

mendeley
1 Mendeley
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Title
Correct Hardware Design and Verification Methods
Published by
Lecture notes in computer science, August 2001
DOI 10.1007/3-540-44798-9
ISBNs
978-3-54-042541-0, 978-3-54-044798-6
Authors

Tiziana Margaria, Tom Melham

Editors

Tiziana Margaria, Tom Melham

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 1 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 1 100%
Readers by discipline Count As %
Computer Science 1 100%
Attention Score in Context

Attention Score in Context

This research output has an Altmetric Attention Score of 9. This is our high-level measure of the quality and quantity of online attention that it has received. This Attention Score, as well as the ranking and number of research outputs shown below, was calculated when the research output was last mentioned on 22 September 2021.
All research outputs
#3,354,529
of 23,234,261 outputs
Outputs from Lecture notes in computer science
#759
of 8,154 outputs
Outputs of similar age
#3,637
of 38,877 outputs
Outputs of similar age from Lecture notes in computer science
#6
of 35 outputs
Altmetric has tracked 23,234,261 research outputs across all sources so far. Compared to these this one has done well and is in the 84th percentile: it's in the top 25% of all research outputs ever tracked by Altmetric.
So far Altmetric has tracked 8,154 research outputs from this source. They typically receive a little more attention than average, with a mean Attention Score of 5.0. This one has done well, scoring higher than 89% of its peers.
Older research outputs will score higher simply because they've had more time to accumulate mentions. To account for age we can compare this Altmetric Attention Score to the 38,877 tracked outputs that were published within six weeks on either side of this one in any source. This one has done well, scoring higher than 86% of its contemporaries.
We're also able to compare this research output to 35 others from the same source and published within six weeks on either side of this one. This one has done well, scoring higher than 82% of its contemporaries.