↓ Skip to main content

A 4Mb Embedded SLC Resistive-RAM Macro with 7.2ns Read-Write Random-Access Time and 160ns MLC-Access Capability

Overview of attention for article published in this source, February 2011
Altmetric Badge

Mentioned by

patent
7 patents

Readers on

mendeley
83 Mendeley
You are seeing a free-to-access but limited selection of the activity Altmetric has collected about this research output. Click here to find out more.
Article details
Title
A 4Mb Embedded SLC Resistive-RAM Macro with 7.2ns Read-Write Random-Access Time and 160ns MLC-Access Capability
Published by
Institute of Electrical and Electronics Engineers (IEEE), February 2011
DOI 10.1109/isscc.2011.5746281
Authors

Login to access the Attention Digest and the Sentiment Analysis related to this output.

Timeline Attention over time Attention Score history
Login to access the full charts related to this output.
Mendeley demographics

Mendeley demographics

The data shown below were compiled from readership statistics for 83 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Geographical breakdown
Country Count As %
United States 1 1%
Singapore 1 1%
Spain 1 1%
Canada 1 1%
Unknown 79 95%

Demographic breakdown

Readers by professional status
Readers by professional status Count As %
Student > Ph. D. Student 33 40%
Student > Master 10 12%
Researcher 7 8%
Student > Doctoral Student 3 4%
Student > Bachelor 3 4%
Other 10 12%
Unknown 17 20%
Readers by discipline
Readers by discipline Count As %
Engineering 47 57%
Materials Science 10 12%
Computer Science 3 4%
Physics and Astronomy 3 4%
Business, Management and Accounting 2 2%
Other 0 0%
Unknown 18 22%