An Efficient Algorithm of Adjustable Delay Buffer Insertion for Clock Skew Minimization in Multiple Dynamic Supply Voltage Designs

Overview of attention for article published in this source, January 2011

Altmetric Badge

Mentioned by

patent: 1 patent

Readers on

mendeley: 6 Mendeley

So far, Altmetric has seen 1 patent that references this research output.

System and method for clock distribution in a digital circuit

Grant US-12327075-B2

United States of America

This page shows the most recent patents that mention this research output. Click here to find out how to access more activity.