CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme for Reducing Yield Loss Risk in At-Speed Scan Testing

Overview of attention for article published in this source, November 2008

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So far, Altmetric has seen 33 patents that reference this research output.

Programmable test compression architecture input/output shift register coupled to SCI/SCO/P…

Grant US-12013434-B2

United States of America

Test compression in a JTAG daisy-chain environment

Grant US-11965930-B2

United States of America

Test compression in a JTAG daisy-chain environment

Grant US-11639963-B2

United States of America

Programmable test compression architecture input/output shift register coupled to SCI/SCO/P…

Grant US-11567131-B2

United States of America

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