A Built-In Self-Test Scheme for the Post-Bond Test of TSVs in 3D ICs

Overview of attention for article published in this source, May 2011

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Testing through-silicon-vias

Grant US-11600349-B2

United States of America

Testing through-silicon-vias

Grant US-11004530-B2

United States of America

Testing through-silicon-vias

Grant US-10262750-B2

United States of America

Detecting defective connections in stacked memory devices

Grant US-9607716-B2

United States of America

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