An iterative cutting procedure for determining the optimal wafer exposure pattern

Overview of attention for article published in IEEE Transactions on Semiconductor Manufacturing, January 1999

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Method for enhancing wafer exposure effectiveness and efficiency

Grant US-8407631-B2

United States of America

METHOD FOR ENHANCING WAFER EXPOSURE EFFECTIVENESS AND EFFICIENCY

Application US-20120046775-A1

United States of America

Wafer layout optimization method and system

Grant US-7882481-B2

United States of America

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