TAIR: testability analysis by implication reasoning

Overview of attention for article published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, January 2000

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Methods for generating test patterns for sequential circuits

Grant US-8156395-B2

United States of America

Single-pass, concurrent-validation methods for generating test patterns for sequential…

Grant US-7958421-B2

United States of America

Single-pass methods for generating test patterns for sequential circuits

Grant US-7231571-B2

United States of America

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