On Reducing Test Application Time for Scan Circuits Using Limited Scan Operations and Transfer Sequences

Overview of attention for article published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, October 2005

Altmetric Badge

Mentioned by

patent: 3 patents

Readers on

mendeley: 4 Mendeley

So far, Altmetric has seen 3 patents that reference this research output.

Dynamic clock domain bypass for scan chains

Grant US-8812921-B2

United States of America

Scan test circuitry configured for bypassing selected segments of a multi-segment scan…

Grant US-8726108-B2

United States of America

Scan test circuitry with delay defect bypass functionality

Grant US-8645778-B2

United States of America

This page shows the most recent patents that mention this research output. Click here to find out how to access more activity.