Wide $V_{\rm DD}$ Embedded Asynchronous SRAM with Dual-Mode Self-Timed Technique for Dynamic Voltage Systems

Overview of attention for article published in IEEE Transactions on Circuits and Systems I: Regular Papers, December 2008

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Multiport memory with matching address control

Grant US-9208856-B2

United States of America

Synchronous multiple port memory with asynchronous ports

Grant US-8971145-B2

United States of America

Synchronous multiple port memory with asynchronous ports

Grant US-8848480-B1

United States of America

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