O with DFE Receiver in 32 nm SOI CMOS Technology

Overview of attention for article published in IEEE Journal of Solid-State Circuits, April 2015

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patent: 6 patents

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mendeley: 26 Mendeley

So far, Altmetric has seen 6 patents that reference this research output.

Quadrature circuit interconnect architecture with clock forwarding

Grant US-11979480-B2

United States of America

07 May 2024

PAM-4 receiver with jitter compensation clock and data recovery

Grant US-11757613-B2

United States of America

12 Sep 2023

High-speed transmitter including a multiplexer using multi-phase clocks

Grant US-10749505-B2

United States of America

18 Aug 2020

Unidirectional clock signaling in a high-speed serial link

Grant US-10423567-B2

United States of America

24 Sep 2019

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