Fluorine enhanced oxidation of silicon at low temperatures

Overview of attention for article published in Applied Physics Letters, September 1994

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Method of room temperature covalent bonding

Grant US-11760059-B2

United States of America

Vertical FET with asymmetric threshold voltage and channel thicknesses

Grant US-11158715-B2

United States of America

Method of room temperature covalent bonding

Grant US-10434749-B2

United States of America

Three dimensional device integration method and integrated device

Grant US-10366962-B2

United States of America

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