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High performance embedded architectures and compilers : second international conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007 : proceedings

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Cover of 'High performance embedded architectures and compilers : second international conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007 : proceedings'

Table of Contents

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    Book Overview
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    Chapter 1 Keynote: Insight, Not (Random) Numbers: An Embedded Perspective
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    Chapter 2 Compiler-Assisted Memory Encryption for Embedded Processors
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    Chapter 3 Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems
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    Chapter 4 Applying Decay to Reduce Dynamic Power in Set-Associative Caches
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    Chapter 5 Virtual Registers: Reducing Register Pressure Without Enlarging the Register File
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    Chapter 6 Bounds Checking with Taint-Based Analysis
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    Chapter 7 Reducing Exit Stub Memory Consumption in Code Caches
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    Chapter 8 Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling
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    Chapter 9 Fetch Gating Control Through Speculative Instruction Window Weighting
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    Chapter 10 Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches
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    Chapter 11 Branch History Matching: Branch Predictor Warmup for Sampled Simulation
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    Chapter 12 Sunflower : Full-System, Embedded Microarchitecture Evaluation
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    Chapter 13 Efficient Program Power Behavior Characterization
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    Chapter 14 Performance/Energy Optimization of DSP Transforms on the XScale Processor
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    Chapter 15 Arx: A Toolset for the Efficient Simulation and Direct Synthesis of High-Performance Signal Processing Algorithms
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    Chapter 16 A Throughput-Driven Task Creation and Mapping for Network Processors
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    Chapter 17 MiDataSets: Creating the Conditions for a More Realistic Evaluation of Iterative Optimization
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    Chapter 18 Evaluation of Offset Assignment Heuristics
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    Chapter 19 Customizing the Datapath and ISA of Soft VLIW Processors
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    Chapter 20 Instruction Set Extension Generation with Considering Physical Constraints
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1 patent

Citations

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3 Dimensions

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Title
High performance embedded architectures and compilers : second international conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007 : proceedings
Published by
Springer, January 2007
DOI 10.1007/978-3-540-69338-3
ISBNs
978-3-54-069337-6, 978-3-54-069338-3
Authors

Bosschere, Koen de

Editors

Bosschere, Koen, Kaeli, David, Stenström, Per, Whalley, David, Ungerer, Theo

Mendeley readers

The data shown below were compiled from readership statistics for 6 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Germany 1 17%
Unknown 5 83%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 2 33%
Student > Master 1 17%
Unknown 3 50%
Readers by discipline Count As %
Computer Science 2 33%
Engineering 1 17%
Unknown 3 50%