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Mendeley readers
Chapter title |
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches
|
---|---|
Chapter number | 10 |
Book title |
High Performance Embedded Architectures and Compilers
|
Published by |
Springer, Berlin, Heidelberg, January 2007
|
DOI | 10.1007/978-3-540-69338-3_10 |
Book ISBNs |
978-3-54-069337-6, 978-3-54-069338-3
|
Authors |
Sonia López, Steve Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares, López, Sonia, Dropsho, Steve, Albonesi, David H., Garnica, Oscar, Lanchares, Juan |
Mendeley readers
The data shown below were compiled from readership statistics for 5 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
United States | 1 | 20% |
Unknown | 4 | 80% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Student > Ph. D. Student | 2 | 40% |
Librarian | 1 | 20% |
Professor > Associate Professor | 1 | 20% |
Other | 1 | 20% |
Readers by discipline | Count | As % |
---|---|---|
Computer Science | 2 | 40% |
Engineering | 2 | 40% |
Social Sciences | 1 | 20% |