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Hardware Acceleration of EDA Algorithms

Overview of attention for book
Cover of 'Hardware Acceleration of EDA Algorithms'

Table of Contents

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    Book Overview
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    Chapter 1 Introduction
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    Chapter 2 Hardware Platforms
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    Chapter 3 GPU Architecture and the CUDA Programming Model
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    Chapter 4 Accelerating Boolean Satisfiability on a Custom IC
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    Chapter 5 Accelerating Boolean Satisfiability on an FPGA
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    Chapter 6 Accelerating Boolean Satisfiability on a Graphics Processing Unit
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    Chapter 7 Accelerating statistical static Timing Analysis Using Graphics Processors
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    Chapter 8 Accelerating Fault Simulation Using Graphics Processors
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    Chapter 9 Fault Table Generation Using Graphics Processors
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    Chapter 10 Accelerating Circuit Simulation Using Graphics Processors
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    Chapter 11 Automated Approach for Graphics Processor Based Software Acceleration
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    Chapter 12 Conclusions
Attention for Chapter 9: Fault Table Generation Using Graphics Processors
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Citations

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Chapter title
Fault Table Generation Using Graphics Processors
Chapter number 9
Book title
Hardware Acceleration of EDA Algorithms
Published by
Springer, Boston, MA, January 2010
DOI 10.1007/978-1-4419-0944-2_9
Book ISBNs
978-1-4419-0943-5, 978-1-4419-0944-2
Authors

Kanupriya Gulati, Sunil P. Khatri

View on publisher site
Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 1 100%

Demographic breakdown

Readers by professional status Count As %
Researcher 1 100%
Readers by discipline Count As %
Computer Science 1 100%

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