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Cryptographic Hardware and Embedded Systems - CHES 2007

Overview of attention for book
Cryptographic Hardware and Embedded Systems - CHES 2007
Springer, Berlin, Heidelberg

Table of Contents

  1. Altmetric Badge
    Book Overview
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    Chapter 1 A First-Order DPA Attack Against AES in Counter Mode with Unknown Initial Counter
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    Chapter 2 Gaussian Mixture Models for Higher-Order Side Channel Analysis
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    Chapter 3 Side Channel Cryptanalysis of a Higher Order Masking Scheme
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    Chapter 4 High-Speed True Random Number Generation with Logic Gates Only
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    Chapter 5 FPGA Intrinsic PUFs and Their Use for IP Protection
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    Chapter 6 Evaluation of the Masked Logic Style MDPL on a Prototype Chip
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    Chapter 7 Masking and Dual-Rail Logic Don’t Add Up
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    Chapter 8 DPA-Resistance Without Routing Constraints?
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    Chapter 9 On the Power of Bitslice Implementation on Intel Core2 Processor
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    Chapter 10 Highly Regular Right-to-Left Algorithms for Scalar Multiplication
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    Chapter 11 MAME: A Compression Function with Reduced Hardware Requirements
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    Chapter 12 Collision Attacks on AES-Based MAC: Alpha-MAC
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    Chapter 13 Secret External Encodings Do Not Prevent Transient Fault Analysis
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    Chapter 14 Two New Techniques of Side-Channel Cryptanalysis
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    Chapter 15 AES Encryption Implementation and Analysis on Commodity Graphics Processing Units
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    Chapter 16 Multi-gigabit GCM-AES Architecture Optimized for FPGAs
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    Chapter 17 Arithmetic Operators for Pairing-Based Cryptography
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    Chapter 18 FPGA Design of Self-certified Signature Verification on Koblitz Curves
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    Chapter 19 How to Maximize the Potential of FPGA Resources for Modular Exponentiation
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    Chapter 20 TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks
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    Chapter 21 Power Analysis Resistant AES Implementation with Instruction Set Extensions
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    Chapter 22 Power and EM Attacks on Passive $13.56\,\textrm{MHz}$ RFID Devices
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    Chapter 23 RFID Noisy Reader How to Prevent from Eavesdropping on the Communication?
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    Chapter 24 RF-DNA: Radio-Frequency Certificates of Authenticity
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    Chapter 25 CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method
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    Chapter 26 Collision Search for Elliptic Curve Discrete Logarithm over GF(2 m ) with FPGA
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    Chapter 27 A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations
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    Chapter 28 Differential Behavioral Analysis
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    Chapter 29 Information Theoretic Evaluation of Side-Channel Resistant Logic Styles
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    Chapter 30 On the Implementation of a Fast Prime Generation Algorithm
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    Chapter 31 PRESENT: An Ultra-Lightweight Block Cipher
Overall attention for this book and its chapters
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Mentioned by

3 tweeters
4 patents
3 Wikipedia pages


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Cryptographic Hardware and Embedded Systems - CHES 2007
Published by
Springer, Berlin, Heidelberg, January 2007
DOI 10.1007/978-3-540-74735-2
978-3-54-074734-5, 978-3-54-074735-2

Paillier, Pascal, Verbauwhede, Ingrid


Pascal Paillier, Ingrid Verbauwhede

Twitter Demographics

The data shown below were collected from the profiles of 3 tweeters who shared this research output. Click here to find out more about how the information was compiled.

Mendeley readers

The data shown below were compiled from readership statistics for 45 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
United States 2 4%
Portugal 1 2%
Unknown 42 93%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 6 13%
Lecturer 2 4%
Student > Bachelor 2 4%
Professor 1 2%
Other 1 2%
Other 3 7%
Unknown 30 67%
Readers by discipline Count As %
Computer Science 9 20%
Engineering 6 13%
Unknown 30 67%