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Cryptographic Hardware and Embedded Systems, CHES 2010

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Cover of 'Cryptographic Hardware and Embedded Systems, CHES 2010'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 Quark: A Lightweight Hash
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    Chapter 2 PRINTcipher: A Block Cipher for IC-Printing
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    Chapter 3 Sponge-Based Pseudo-Random Number Generators
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    Chapter 4 A High Speed Coprocessor for Elliptic Curve Scalar Multiplications over $\mathbb{F}_p$
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    Chapter 5 Co-Z Addition Formulæ and Binary Ladders on Elliptic Curves
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    Chapter 6 Efficient Techniques for High-Speed Elliptic Curve Cryptography
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    Chapter 7 Analysis and Improvement of the Random Delay Countermeasure of CHES 2009
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    Chapter 8 New Results on Instruction Cache Attacks
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    Chapter 9 Correlation-Enhanced Power Analysis Collision Attack
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    Chapter 10 Side-Channel Analysis of Six SHA-3 Candidates
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    Chapter 11 Flash Memory ‘Bumping’ Attacks
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    Chapter 12 Self-referencing: A Scalable Side-Channel Approach for Hardware Trojan Detection
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    Chapter 13 When Failure Analysis Meets Side-Channel Attacks
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    Chapter 14 Fast Exhaustive Search for Polynomial Systems in ${\mathbb{F}_2}$
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    Chapter 15 256 Bit Standardized Crypto for 650 GE – GOST Revisited
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    Chapter 16 Mixed Bases for Efficient Inversion in ${{\mathbb F}{((2^2)^2)}{2}}$ and Conversion Matrices of SubBytes of AES
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    Chapter 17 Developing a Hardware Evaluation Method for SHA-3 Candidates
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    Chapter 18 Fair and Comprehensive Methodology for Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs
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    Chapter 19 Performance Analysis of the SHA-3 Candidates on Exotic Multi-core Architectures
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    Chapter 20 XBX: eXternal Benchmarking eXtension for the SUPERCOP Crypto Benchmarking Framework
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    Chapter 21 Public Key Perturbation of Randomized RSA Implementations
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    Chapter 22 Fault Sensitivity Analysis
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    Chapter 23 An Alternative to Error Correction for SRAM-Like PUFs
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    Chapter 24 New High Entropy Element for FPGA Based True Random Number Generators
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    Chapter 25 The Glitch PUF: A New Delay-PUF Architecture Exploiting Glitch Shapes
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    Chapter 26 Garbled Circuits for Leakage-Resilience: Hardware Implementation and Evaluation of One-Time Programs
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    Chapter 27 ARMADILLO: A Multi-purpose Cryptographic Primitive Dedicated to Hardware
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    Chapter 28 Provably Secure Higher-Order Masking of AES
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    Chapter 29 Algebraic Side-Channel Analysis in the Presence of Errors
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    Chapter 30 Coordinate Blinding over Large Prime Fields
Attention for Chapter 6: Efficient Techniques for High-Speed Elliptic Curve Cryptography
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Chapter title
Efficient Techniques for High-Speed Elliptic Curve Cryptography
Chapter number 6
Book title
Cryptographic Hardware and Embedded Systems, CHES 2010
Published by
Springer, Berlin, Heidelberg, August 2010
DOI 10.1007/978-3-642-15031-9_6
Book ISBNs
978-3-64-215030-2, 978-3-64-215031-9
Authors

Patrick Longa, Catherine Gebotys, Longa, Patrick, Gebotys, Catherine

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 50 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 50 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 12 24%
Student > Master 12 24%
Researcher 4 8%
Lecturer 4 8%
Student > Postgraduate 3 6%
Other 9 18%
Unknown 6 12%
Readers by discipline Count As %
Computer Science 31 62%
Engineering 7 14%
Mathematics 2 4%
Physics and Astronomy 2 4%
Design 1 2%
Other 0 0%
Unknown 7 14%