You are seeing a free-to-access but limited selection of the activity Altmetric has collected about this research output.
Click here to find out more.
Mendeley readers
Chapter title |
A Design Methodology for Secured ICs Using Dynamic Current Mode Logic
|
---|---|
Chapter number | 56 |
Book title |
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
|
Published by |
Springer, Berlin, Heidelberg, September 2005
|
DOI | 10.1007/11556930_56 |
Book ISBNs |
978-3-54-029013-1, 978-3-54-032080-7
|
Authors |
François Macé, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat |
Mendeley readers
The data shown below were compiled from readership statistics for 6 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
Unknown | 6 | 100% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Student > Ph. D. Student | 2 | 33% |
Student > Master | 2 | 33% |
Student > Doctoral Student | 1 | 17% |
Other | 1 | 17% |
Readers by discipline | Count | As % |
---|---|---|
Computer Science | 4 | 67% |
Engineering | 2 | 33% |
Design | 1 | 17% |