Power-Aware Computer Systems
Overview of attention for book
Table of Contents
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Altmetric BadgeBook Overview
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Altmetric BadgeChapter 1 System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors
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Altmetric BadgeChapter 2 Ramp Up/Down Functional Unit to Reduce Step Power
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Altmetric BadgeChapter 3 An Adaptive Issue Queue for Reduced Power at High Performance
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Altmetric BadgeChapter 4 Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform
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Altmetric BadgeChapter 5 Exploiting Content Variation and Perception in Power-Aware 3D Graphics Rendering
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Altmetric BadgeChapter 6 Compiler-Directed Dynamic Frequency and Voltage Scheduling
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Altmetric BadgeChapter 7 Cache-Line Decay: A Mechanism to Reduce Cache Leakage Power
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Altmetric BadgeChapter 8 Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
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Altmetric BadgeChapter 9 TEM 2 P 2 EST: A Thermal Enabled Multi-model Power/Performance ESTimator
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Altmetric BadgeChapter 10 Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor
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Altmetric BadgeChapter 11 A Comparison of Two Architectural Power Models