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Mendeley readers
Chapter title |
Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption
|
---|---|
Chapter number | 36 |
Book title |
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
|
Published by |
Springer, Berlin, Heidelberg, September 2007
|
DOI | 10.1007/978-3-540-74442-9_36 |
Book ISBNs |
978-3-54-074441-2, 978-3-54-074442-9
|
Authors |
Miguel Peon-Quiros, Alexandros Bartzas, Stylianos Mamagkakis, Francky Catthoor, Jose M. Mendias, Dimitrios Soudris |
Mendeley readers
The data shown below were compiled from readership statistics for 5 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
Greece | 1 | 20% |
Unknown | 4 | 80% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Student > Ph. D. Student | 2 | 40% |
Researcher | 2 | 40% |
Professor > Associate Professor | 1 | 20% |
Readers by discipline | Count | As % |
---|---|---|
Computer Science | 5 | 100% |