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A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Springer, Berlin, Heidelberg, September 2006
Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo
The data shown below were compiled from readership statistics for 3 Mendeley readers of this research output. Click here to see the associated Mendeley record.
|Readers by professional status||Count||As %|
|Student > Ph. D. Student||1||33%|
|Student > Doctoral Student||1||33%|
|Readers by discipline||Count||As %|