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Considering Zero-Arrival Time and Block-Arrival Time in Hierarchical Functional Timing Analysis
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Springer, Berlin, Heidelberg, September 2006
Daniel Lima Ferrão, Ricardo Reis, José Luís Güntzel
The data shown below were compiled from readership statistics for 4 Mendeley readers of this research output. Click here to see the associated Mendeley record.
|Readers by professional status||Count||As %|
|Readers by discipline||Count||As %|
|Nursing and Health Professions||1||25%|