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Mendeley readers
Chapter title |
Body Bias Generator for Leakage Power Reduction of Low-Voltage Digital Logic Circuits
|
---|---|
Chapter number | 34 |
Book title |
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
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Published by |
Springer, Berlin, Heidelberg, September 2006
|
DOI | 10.1007/11847083_34 |
Book ISBNs |
978-3-54-039094-7, 978-3-54-039097-8
|
Authors |
Ji-Yong Jeong, Gil-Su Kim, Jong-Pil Son, Woo-Jin Rim, Soo-Won Kim, Jeong, Ji-Yong, Kim, Gil-Su, Son, Jong-Pil, Rim, Woo-Jin, Kim, Soo-Won |
Mendeley readers
The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
Unknown | 1 | 100% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Student > Ph. D. Student | 1 | 100% |
Readers by discipline | Count | As % |
---|---|---|
Engineering | 1 | 100% |