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Low Power RF Circuit Design in Standard CMOS Technology

Overview of attention for book
Cover of 'Low Power RF Circuit Design in Standard CMOS Technology'

Table of Contents

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    Book Overview
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    Chapter 1 Introduction
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    Chapter 2 Power Considerations in Analog RF CMOS Circuits
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    Chapter 3 Impact of Architecture Selection on RF Front-End Power Consumption
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    Chapter 4 Technology Structural Alternatives in Standard CMOS Technologies for Low-Power Analog Design
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    Chapter 5 Schematic Design Techniques for Power Saving in RF
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    Chapter 6 RF Amplifier Design
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    Chapter 7 Mixer Design
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    Chapter 8 Phase Locked Loop (PLL) Design
Attention for Chapter 8: Phase Locked Loop (PLL) Design
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Chapter title
Phase Locked Loop (PLL) Design
Chapter number 8
Book title
Low Power RF Circuit Design in Standard CMOS Technology
Published by
Springer, Berlin, Heidelberg, January 2011
DOI 10.1007/978-3-642-22987-9_8
Book ISBNs
978-3-64-222986-2, 978-3-64-222987-9
Authors

Unai Alvarado, Guillermo Bistué, Iñigo Adín

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Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Iran, Islamic Republic of 1 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 1 100%
Readers by discipline Count As %
Engineering 1 100%

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