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Applied Reconfigurable Computing

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Cover of 'Applied Reconfigurable Computing'

Table of Contents

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    Book Overview
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    Chapter 1 Fault-Tolerant Architecture for On-board Dual-Core Synthetic-Aperture Radar Imaging
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    Chapter 2 Optimizing CNN-Based Hyperspectral Image Classification on FPGAs
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    Chapter 3 Supporting Columnar In-memory Formats on FPGA: The Hardware Design of Fletcher for Apache Arrow
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    Chapter 4 A Novel Encoder for TDCs
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    Chapter 5 A Resource Reduced Application-Specific FPGA Switch
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    Chapter 6 Software-Defined FPGA Accelerator Design for Mobile Deep Learning Applications
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    Chapter 7 Probabilistic Performance Modelling when Using Partial Reconfiguration to Accelerate Streaming Applications with Non-deterministic Task Scheduling
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    Chapter 8 Leveraging the Partial Reconfiguration Capability of FPGAs for Processor-Based Fail-Operational Systems
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    Chapter 9 (ReCo)Fuse Your PRC or Lose Security: Finally Reliable Reconfiguration-Based Countermeasures on FPGAs
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    Chapter 10 Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
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    Chapter 11 Secure Local Configuration of Intellectual Property Without a Trusted Third Party
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    Chapter 12 HiFlipVX: An Open Source High-Level Synthesis FPGA Library for Image Processing
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    Chapter 13 Real-Time FPGA Implementation of Connected Component Labelling for a 4K Video Stream
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    Chapter 14 A Scalable FPGA-Based Architecture for Depth Estimation in SLAM
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    Chapter 15 Evaluating LULESH Kernels on OpenCL FPGA
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    Chapter 16 The TaPaSCo Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems
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    Chapter 17 Graph-Based Code Restructuring Targeting HLS for FPGAs
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    Chapter 18 UltraSynth: Integration of a CGRA into a Control Engineering Environment
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    Chapter 19 Exploiting Reconfigurable Vector Processing for Energy-Efficient Computation in 3D-Stacked Memories
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    Chapter 20 Automatic Toolflow for VCGRA Generation to Enable CGRA Evaluation for Arithmetic Algorithms
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    Chapter 21 ReM: A Reconfigurable Multipotent Cell for New Distributed Reconfigurable Architectures
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    Chapter 22 Update or Invalidate: Influence of Coherence Protocols on Configurable HW Accelerators
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    Chapter 23 Hybrid Prototyping for Manycore Design and Validation
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    Chapter 24 Evaluation of FPGA Partitioning Schemes for Time and Space Sharing of Heterogeneous Tasks
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    Chapter 25 Third Party CAD Tools for FPGA Design—A Survey of the Current Landscape
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    Chapter 26 Filter-Wise Pruning Approach to FPGA Implementation of Fully Convolutional Network for Semantic Segmentation
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    Chapter 27 Exploring Data Size to Run Convolutional Neural Networks in Low Density FPGAs
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    Chapter 28 Faster Convolutional Neural Networks in Low Density FPGAs Using Block Pruning
Attention for Chapter 10: Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
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Chapter title
Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
Chapter number 10
Book title
Applied Reconfigurable Computing
Published by
Springer, Cham, April 2019
DOI 10.1007/978-3-030-17227-5_10
Book ISBNs
978-3-03-017226-8, 978-3-03-017227-5
Authors

Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 3 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 3 100%

Demographic breakdown

Readers by professional status Count As %
Professor 1 33%
Unknown 2 67%
Readers by discipline Count As %
Computer Science 1 33%
Unknown 2 67%