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Chapter title |
VLSI Design and Synthesis of Reduced Power and High Speed ALU Using Reversible Gates and Vedic Multiplier
|
---|---|
Chapter number | 33 |
Book title |
Advances in Decision Sciences, Image Processing, Security and Computer Vision
|
Published by |
Springer, Cham, July 2019
|
DOI | 10.1007/978-3-030-24318-0_33 |
Book ISBNs |
978-3-03-024317-3, 978-3-03-024318-0
|
Authors |
M. Dasharatha, B. Rajendra Naik, N. S. S. Reddy, Shoban Mude, Dasharatha, M., Rajendra Naik, B., Reddy, N. S. S., Mude, Shoban |