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Chapter title |
A Novel Speedup Evaluation for Multicore Architecture Based Topology of On-Chip Memory
|
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Chapter number | 4 |
Book title |
Parallel Architectures, Algorithms and Programming
|
Published by |
Springer, Singapore, December 2019
|
DOI | 10.1007/978-981-15-2767-8_4 |
Book ISBNs |
978-9-81-152766-1, 978-9-81-152767-8
|
Authors |
XiaoJun Wang, Feng Shi, Hong Zhang, Wang, XiaoJun, Shi, Feng, Zhang, Hong |