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3D Stacked Chips

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Cover of '3D Stacked Chips'

Table of Contents

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    Book Overview
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    Chapter 1 Introduction to Electrical 3D Integration
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    Chapter 2 Copper-Based TSV: Interposer
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    Chapter 3 Energy Efficient Electrical Intra-Chip-Stack Communication
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    Chapter 4 Multi-TSV Crosstalk Channel Equalization with Non-uniform Quantization
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    Chapter 5 Energy Efficient TSV Based Communication Employing 1-Bit Quantization at the Receiver
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    Chapter 6 Clock Generators for Heterogeneous MPSoCs Within 3D Chip Stacks
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    Chapter 7 Two-nanometer Laser Synthesized Si-Nanoparticles for Low Power Memory Applications
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    Chapter 8 Accurate Temperature Measurement for 3D Thermal Management
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    Chapter 9 EDA Environments for 3D Chip Stacks
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    Chapter 10 Integrating 3D Floorplanning and Optimization of Thermal Through-Silicon Vias
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    Chapter 11 Introduction to Optical Inter- and Intraconnects
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    Chapter 12 Optical Through-Silicon Vias
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    Chapter 13 Integrated Optical Devices for 3D Photonic Transceivers
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    Chapter 14 Cantilever Design for Tunable WDM Filters Based on Silicon Microring Resonators
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    Chapter 15 Athermal Photonic Circuits for Optical On-Chip Interconnects
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    Chapter 16 Integrated Circuits for 3D Photonic Transceivers
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    Chapter 17 Review of Interdigitated Back Contacted Full Heterojunction Solar Cell (IBC-SHJ): A Simulation Approach
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