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Cryptographic Hardware and Embedded Systems – CHES 2016

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Cover of 'Cryptographic Hardware and Embedded Systems – CHES 2016'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 Correlated Extra-Reductions Defeat Blinded Regular Exponentiation
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    Chapter 2 Horizontal Side-Channel Attacks and Countermeasures on the ISW Masking Scheme
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    Chapter 3 Towards Easy Leakage Certification
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    Chapter 4 Simple Key Enumeration (and Rank Estimation) Using Histograms: An Integrated Approach
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    Chapter 5 Physical Layer Group Key Agreement for Automotive Controller Area Networks
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    Chapter 6 – vatiCAN – Vetted, Authenticated CAN Bus
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    Chapter 7 Mitigating SAT Attack on Logic Locking
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    Chapter 8 No Place to Hide: Contactless Probing of Secret Data on FPGAs
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    Chapter 9 Strong 8-bit Sboxes with Efficient Masking in Hardware
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    Chapter 10 Masking AES with \(d+1\) Shares in Hardware
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    Chapter 11 Differential Computation Analysis: Hiding Your White-Box Designs is Not Enough
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    Chapter 12 Antikernel: A Decentralized Secure Hardware-Software Operating System Architecture
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    Chapter 13 Software Implementation of Koblitz Curves over Quadratic Fields
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    Chapter 14 QcBits: Constant-Time Small-Key Code-Based Cryptography
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    Chapter 15 \(\mu \) Kummer: Efficient Hyperelliptic Signatures and Key Exchange on Microcontrollers
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    Chapter 16 Flush, Gauss, and Reload – A Cache Attack on the BLISS Lattice-Based Signature Scheme
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    Chapter 17 CacheBleed: A Timing Attack on OpenSSL Constant Time RSA
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    Chapter 18 Cache Attacks Enable Bulk Key Recovery on the Cloud
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    Chapter 19 Strong Machine Learning Attack Against PUFs with No Mathematical Model
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    Chapter 20 Efficient Fuzzy Extraction of PUF-Induced Secrets: Theory and Applications
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    Chapter 21 Run-Time Accessible DRAM PUFs in Commodity Devices
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    Chapter 22 On the Multiplicative Complexity of Boolean Functions and Bitsliced Higher-Order Masking
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    Chapter 23 Reducing the Number of Non-linear Multiplications in Masking Schemes
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    Chapter 24 Faster Evaluation of SBoxes via Common Shares
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    Chapter 25 Four \(\mathbb {Q}\) on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields
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    Chapter 26 A High Throughput/Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths
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    Chapter 27 Efficient High-Speed WPA2 Brute Force Attacks Using Scalable Low-Cost FPGA Clustering
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    Chapter 28 EnCounter: On Breaking the Nonce Barrier in Differential Fault Analysis with a Case-Study on PAEQ
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    Chapter 29 Curious Case of Rowhammer: Flipping Secret Exponent Bits Using Timing Analysis
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    Chapter 30 A Design Methodology for Stealthy Parametric Trojans and Its Application to Bug Attacks
Overall attention for this book and its chapters
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Mentioned by

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Citations

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Title
Cryptographic Hardware and Embedded Systems – CHES 2016
Published by
Springer Berlin Heidelberg, January 2016
DOI 10.1007/978-3-662-53140-2
ISBNs
978-3-66-253139-6, 978-3-66-253140-2
Editors

Benedikt Gierlichs, Axel Y. Poschmann

Twitter Demographics

The data shown below were collected from the profile of 1 tweeter who shared this research output. Click here to find out more about how the information was compiled.

Mendeley readers

The data shown below were compiled from readership statistics for 68 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
United States 2 3%
Portugal 1 1%
Switzerland 1 1%
Unknown 64 94%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 22 32%
Student > Master 11 16%
Researcher 10 15%
Student > Postgraduate 5 7%
Professor 4 6%
Other 10 15%
Unknown 6 9%
Readers by discipline Count As %
Engineering 30 44%
Computer Science 30 44%
Mathematics 1 1%
Unknown 7 10%