ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation

RT @pulp_platform: The paper presenting our open-source, HW/SW RISC-V parallel PCS platform "ControlPULP: A RISC-V On-Chip Parallel Power…

RT @pulp_platform: The paper presenting our open-source, HW/SW RISC-V parallel PCS platform "ControlPULP: A RISC-V On-Chip Parallel Power…

RT @pulp_platform: The paper presenting our open-source, HW/SW RISC-V parallel PCS platform "ControlPULP: A RISC-V On-Chip Parallel Power…

RT @pulp_platform: The paper presenting our open-source, HW/SW RISC-V parallel PCS platform "ControlPULP: A RISC-V On-Chip Parallel Power…