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Computer Aided Verification

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Cover of 'Computer Aided Verification'

Table of Contents

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    Book Overview
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    Chapter 1 Poling: SMT Aided Linearizability Proofs
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    Chapter 2 Finding Bounded Path in Graph Using SMT for Automatic Clock Routing
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    Chapter 3 Cutting the Mix
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    Chapter 4 The Inez Mathematical Programming Modulo Theories Framework
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    Chapter 5 Using Minimal Correction Sets to More Efficiently Compute Minimal Unsatisfiable Sets
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    Chapter 6 Deciding Local Theory Extensions via E-matching
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    Chapter 7 Modular Deductive Verification of Multiprocessor Hardware Designs
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    Chapter 8 Word-Level Symbolic Trajectory Evaluation
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    Chapter 9 Verifying Linearizability of Intel® Software Guard Extensions
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    Chapter 10 Synthesis Through Unification
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    Chapter 11 From Non-preemptive to Preemptive Scheduling Using Synchronization Synthesis
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    Chapter 12 Counterexample-Guided Quantifier Instantiation for Synthesis in SMT
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    Chapter 13 Deductive Program Repair
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    Chapter 14 Quantifying Conformance Using the Skorokhod Metric
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    Chapter 15 Pareto Curves of Multidimensional Mean-Payoff Games
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    Chapter 16 Conflict-Driven Conditional Termination
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    Chapter 17 Predicate Abstraction and CEGAR for Disproving Termination of Higher-Order Functional Programs
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    Chapter 18 Complexity of Bradley-Manna-Sipma Lexicographic Ranking Functions
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    Chapter 19 Measuring with Timed Patterns
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    Chapter 20 Automatic Verification of Stability and Safety for Delay Differential Equations
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    Chapter 21 Time Robustness in MTL and Expressivity in Hybrid System Falsification
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    Chapter 22 Adaptive Concretization for Parallel Program Synthesis
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    Chapter 23 Automatic Completion of Distributed Protocols with Symmetry
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    Chapter 24 An Axiomatic Specification for Sequential Memory Models
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    Chapter 25 Approximate Synchrony: An Abstraction for Distributed Almost-Synchronous Systems
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    Chapter 26 Automated and Modular Refinement Reasoning for Concurrent Programs
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