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Chapter title |
Delay minimal mapping of RTL structures onto LUT based FPGAs
|
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Chapter number | 107 |
Book title |
Field-Programmable Logic and Applications
|
Published by |
Springer, Berlin, Heidelberg, August 1995
|
DOI | 10.1007/3-540-60294-1_107 |
Book ISBNs |
978-3-54-060294-1, 978-3-54-044786-3
|
Authors |
A. R. Naseer, M. Balakrishnan, Anshul Kumar, Naseer, A. R., Balakrishnan, M., Kumar, Anshul |