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Timeline
Chapter title |
VINAS-P: A Tool for Trace Theoretic Verification of Timed Asynchronous Circuits
|
---|---|
Chapter number | 47 |
Book title |
Computer Aided Verification
|
Published by |
Springer, Berlin, Heidelberg, July 2000
|
DOI | 10.1007/10722167_47 |
Book ISBNs |
978-3-54-067770-3, 978-3-54-045047-4
|
Authors |
Tomohiro Yoneda |