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Analysis, Architectures and Modelling of Embedded Systems

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Cover of 'Analysis, Architectures and Modelling of Embedded Systems'

Table of Contents

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    Book Overview
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    Chapter 1 State Machine Based Method for Consolidating Vehicle Data
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    Chapter 2 Automatic HW/SW Interface Modeling for Scratch-Pad and Memory Mapped HW Components in Native Source-Code Co-simulation
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    Chapter 3 Modelling of Device Driver Software by Reflection of the Device Hardware Structure
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    Chapter 4 An Infrastructure for UML-Based Code Generation Tools
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    Chapter 5 A Configurable TLM of Wireless Sensor Networks for Fast Exploration of System Communication Performance
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    Chapter 6 ConcurrenC: A New Approach towards Effective Abstraction of C-Based SLDLs
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    Chapter 7 Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support
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    Chapter 8 Transaction Level Modeling of Best-Effort Channels for Networked Embedded Devices
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    Chapter 9 Modeling Cache Effects at the Transaction Level
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    Chapter 10 Event Stream Calculus for Schedulability Analysis
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    Chapter 11 Real-Time Scheduling in Heterogeneous Systems Considering Cache Reload Time Using Genetic Algorithms
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    Chapter 12 Task-Dependent Processor Shutdown for Hard Real-Time Systems
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    Chapter 13 Experimental Evaluation of a Hybrid Approach for Deriving Service-Time Bounds of Methods in Real-Time Distributed Computing Objects
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    Chapter 14 Efficient Parallel Transaction Level Simulation by Exploiting Temporal Decoupling
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    Chapter 15 Formal Verification for Embedded Systems Design Based on MDE
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    Chapter 16 Systematic Model-in-the-Loop Test of Embedded Control Systems
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    Chapter 17 Proteus, a Hybrid Virtualization Platform for Embedded Systems
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    Chapter 18 Constructing a Multi-OS Platform with Minimal Engineering Cost
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    Chapter 19 A Synchronization Method for Register Traces of Pipelined Processors
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    Chapter 20 Development of Automotive Communication Based Real-Time Systems - A Steer-by-Wire Case Study
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    Chapter 21 Automatic Transformation of System Models in Automotive Electronics
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    Chapter 22 Towards a Load Balancing Middleware for Automotive Infotainment Systems
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    Chapter 23 Towards an Irritable Bowel Syndrome Control System Based on Artificial Neural Networks
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    Chapter 24 A Hybrid Hardware and Software Component Architecture for Embedded System Design
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    Chapter 25 Low–Level Space Optimization of an AES Implementation for a Bit–Serial Fully Pipelined Architecture
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    Chapter 26 The Case for Interpreted Languages in Sensor Networks
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    Chapter 27 Characterization of Inaccessibility in Wireless Networks: A Case Study on IEEE 802.15.4 Standard
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    Chapter 28 FemtoNode: Reconfigurable and Customizable Architecture for Wireless Sensor Networks
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    Chapter 29 Efficient Modeling of Embedded Systems Using Computer-Aided Recoding
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    Chapter 30 New Challenges for Designers of Fault Tolerant Embedded Systems Based on Future Technologies
Attention for Chapter 8: Transaction Level Modeling of Best-Effort Channels for Networked Embedded Devices
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Chapter title
Transaction Level Modeling of Best-Effort Channels for Networked Embedded Devices
Chapter number 8
Book title
Analysis, Architectures and Modelling of Embedded Systems
Published in
ADS, September 2009
DOI 10.1007/978-3-642-04284-3_8
Book ISBNs
978-3-64-204283-6, 978-3-64-204284-3
Authors

Amal Banerjee, Andreas Gerstlauer

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 3 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 3 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 1 33%
Student > Bachelor 1 33%
Unknown 1 33%
Readers by discipline Count As %
Computer Science 1 33%
Engineering 1 33%
Unknown 1 33%