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Computer Aided Verification

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Cover of 'Computer Aided Verification'

Table of Contents

  1. Altmetric Badge
    Book Overview
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    Chapter 1 Practical challenges for industrial formal verification tools
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    Chapter 2 Formal verification of digital systems, from ASICs to HW/SW codesign — a pragmatic approach
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    Chapter 3 The industrial success of verification tools based on stålmarck's method
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    Chapter 4 Formal verification — Applications & case studies
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    Chapter 5 Automatic abstraction techniques for propositional μ -calculus model checking
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    Chapter 6 A compositional rule for hardware design refinement
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    Chapter 7 Module checking revisited
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    Chapter 8 Using compositional preorders in the verification of sliding window protocol
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    Chapter 9 An efficient decision procedure for the theory of fixed-sized bit-vectors
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    Chapter 10 Construction of abstract state graphs with PVS
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    Chapter 11 Verification of a chemical process leak test procedure
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    Chapter 12 Automatic datapath extraction for efficient usage of HDD
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    Chapter 13 An n log n algorithm for online BDD refinement
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    Chapter 14 Weak bisimulation for fully probabilistic processes
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    Chapter 15 Towards a mechanization of cryptographic protocol verification
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    Chapter 16 Efficient model checking using tabled resolution
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    Chapter 17 Containment of regular languages in non-regular timing diagram languages is decidable
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    Chapter 18 An improved reachability analysis method for strongly linear hybrid systems (extended abstract)
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    Chapter 19 Some progress in the symbolic verification of timed automata
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    Chapter 20 STARI: A case study in compositional and hierarchical timing verification
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    Chapter 21 A provably correct embedded verifier for the certification of safety critical software
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    Chapter 22 Model checking in a microprocessor design project
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    Chapter 23 Some thoughts on statecharts, 13 years later
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    Chapter 24 On-the-fly model checking under fairness that exploits symmetry
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    Chapter 25 Exploiting symmetry when verifying transistor-level circuits by symbolic trajectory evaluation
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    Chapter 26 Parallelizing the Mur ϕ verifier
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    Chapter 27 A new heuristic for bad cycle detection using BDDs
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    Chapter 28 Efficient detection of vacuity in ACTL formulas
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    Chapter 29 Model checking and transitive-closure logic
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    Chapter 30 Boolean and 2-adic numbers based techniques for verifying synchronous designs
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    Chapter 31 Programs with quasi-stable channels are effectively recognizable
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    Chapter 32 Combining constraint solving and symbolic model checking for a class of systems with non-linear constraints
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    Chapter 33 Relaxed visibility enhances partial order reduction
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    Chapter 34 Partial-order reduction in symbolic state space exploration
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    Chapter 35 Deadlock checking using net unfoldings
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    Chapter 36 Trace table based approach for pipelined microprocessor verification
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    Chapter 37 On combining formal and informal verification
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    Chapter 38 Efficient modeling of memory arrays in symbolic simulation
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    Chapter 39 Symbolic model checking of infinite state systems using presburger arithmetic
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    Chapter 40 Parametrized verification of linear networks using automata as invariants
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    Chapter 41 Symbolic model checking with rich assertional languages
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    Chapter 42 The invariant checker: Automated deductive verification of reactive systems
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    Chapter 43 The PEP tool
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    Chapter 44 TermiLog: A system for checking termination of queries to logic programs
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    Chapter 45 Mosel : A sound and efficient tool for M2L(Str)
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    Chapter 46 The verus tool: A quantitative approach to the formal verification of real-time systems
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    Chapter 47 Uppaal : Status & developments
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    Chapter 48 HyTech : A model checker for hybrid systems
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    Chapter 49 SMC: A symmetry based model checker for verification of liveness properties
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    Chapter 50 μcke — Efficient μ-calculus model checking
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    Chapter 51 Prod 3.2 An advanced tool for efficient reachability analysis
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    Chapter 52 VeriSoft: A tool for the automatic analysis of concurrent reactive software
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    Chapter 53 RuleBase: Model checking at IBM
Overall attention for this book and its chapters
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Mentioned by

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1 Wikipedia page

Citations

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Title
Computer Aided Verification
Published by
Springer, Berlin, Heidelberg, January 1997
DOI 10.1007/3-540-63166-6
ISBNs
978-3-54-063166-8, 978-3-54-069195-2
Editors

Orna Grumberg

Mendeley readers

The data shown below were compiled from readership statistics for 8 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 8 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 6 75%
Student > Master 1 13%
Researcher 1 13%
Readers by discipline Count As %
Computer Science 8 100%