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The g m / I D Methodology, A Sizing Tool for Low-voltage Analog CMOS Circuits

Overview of attention for book
Attention for Chapter 4: Compact Modeling
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Chapter title
Compact Modeling
Chapter number 4
Book title
The g m / I D Methodology, A Sizing Tool for Low-voltage Analog CMOS Circuits
Published by
Springer, Boston, MA, January 2010
DOI 10.1007/978-0-387-47101-3_4
Book ISBNs
978-0-387-47100-6, 978-0-387-47101-3
Authors

Paul G. A. Jespers, Jespers, Paul G. A.

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Iran, Islamic Republic of 1 100%
Italy 1 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 25 2500%
Student > Master 13 1300%
Researcher 7 700%
Student > Doctoral Student 5 500%
Student > Bachelor 2 200%
Other 6 600%
Readers by discipline Count As %
Engineering 47 4700%
Physics and Astronomy 3 300%
Arts and Humanities 2 200%
Business, Management and Accounting 1 100%
Materials Science 1 100%
Other 1 100%