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CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies

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Cover of 'CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies'

Table of Contents

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    Book Overview
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    Chapter 1 Introduction and Motivation
  3. Altmetric Badge
    Chapter 2 SRAM Circuit Design and Operation
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    Chapter 3 SRAM Cell Stability: Definition, Modeling and Testing
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    Chapter 4 Traditional SRAM Fault Models and Test Practices
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    Chapter 5 Techniques for Detection of SRAM Cells with Stability Faults
  7. Altmetric Badge
    Chapter 6 Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques
Attention for Chapter 6: Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques
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Readers on

mendeley
2 Mendeley
Summary
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Chapter title
Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques
Chapter number 6
Book title
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies
Published by
Springer, Dordrecht, January 2008
DOI 10.1007/978-1-4020-8363-1_6
Book ISBNs
978-1-4020-8362-4, 978-1-4020-8363-1
View on publisher site
Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 2 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 2 100%

Demographic breakdown

Readers by professional status Count As %
Other 2 100%
Readers by discipline Count As %
Computer Science 2 100%

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