Power Distribution Networks with On-Chip Decoupling Capacitors

Table of Contents

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   Book Overview
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   Chapter 1 Introduction
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   Chapter 2 Inductive Properties of Electric Circuits
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   Chapter 3 Properties of On-Chip Inductive Current Loops
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   Chapter 4 Electromigration
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   Chapter 5 Decoupling Capacitance
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   Chapter 6 Scaling Trends of On-Chip Power Distribution Noise
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   Chapter 7 Conclusions
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   Chapter 8 High Performance Power Distribution Systems
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    Chapter 9 On-Chip Power Distribution Networks
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    Chapter 10 Computer-Aided Design and Analysis
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    Chapter 11 Closed-Form Expressions for Fast IR Drop Analysis
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    Chapter 12 Conclusions
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    Chapter 13 Inductive Properties of On-Chip Power Distribution Grids
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    Chapter 14 Variation of Grid Inductance with Frequency
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    Chapter 15 Inductance/Area/Resistance Tradeoffs
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    Chapter 16 Inductance Model of Interdigitated Power and Ground Distribution Networks
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    Chapter 17 On-Chip Power Noise Reduction Techniques
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    Chapter 18 Noise Issues in On-Chip Power Distribution Networks
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    Chapter 19 Conclusions
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    Chapter 20 Effective Radii of On-Chip Decoupling Capacitors
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    Chapter 21 Efficient Placement of Distributed On-Chip Decoupling Capacitors
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    Chapter 22 Simultaneous Co-Design of Distributed On-Chip Power Supplies and Decoupling Capacitors
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    Chapter 23 Conclusions
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    Chapter 24 Impedance Characteristics of Multi-Layer Grids
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    Chapter 25 Multi-Layer Interdigitated Power Distribution Networks
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    Chapter 26 Conclusions
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    Chapter 27 Multiple On-Chip Power Supply Systems
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    Chapter 28 On-Chip Power Distribution Grids with Multiple Supply Voltages
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    Chapter 29 Decoupling Capacitors for Multi-Voltage Power Distribution Systems
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    Chapter 30 Conclusions
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    Chapter 31 Closing Remarks