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The SPARC Technical Papers

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Cover of 'The SPARC Technical Papers'

Table of Contents

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    Book Overview
  2. Altmetric Badge
    Chapter 1 The Scalable Processor Architecture (SPARC)
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    Chapter 2 The Scalable Processor Architecture (SPARC)
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    Chapter 3 A RISC Tutorial
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    Chapter 4 Why RISC Has Won
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    Chapter 5 SPARC: A Total Solution for RISC
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    Chapter 6 The Role of RISC in Advanced Computer Design
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    Chapter 7 First 32-Bit SPARC-Based Processors Implemented in High-Speed CMOS
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    Chapter 8 SPARC: An ASIC Solution for High-Performance Microprocessors
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    Chapter 9 SPARC Implementations: ASIC vs. Custom Design
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    Chapter 10 Sunrise: A High-Performance 32-Bit Microprocessor
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    Chapter 11 CMOS Custom Implementation of the SPARC Architecture
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    Chapter 12 CMOS Gate-Array Implementation of the SPARC Architecture
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    Chapter 13 Implementing SPARC: A High-Performance 32-Bit RISC Microprocessor
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    Chapter 14 Design Considerations for a Bipolar Implementation of SPARC
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    Chapter 15 Bipolar ECL Implementation of SPARC
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    Chapter 16 Implementing SPARC in ECL
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    Chapter 17 SPARC: An Open RISC Architecture
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    Chapter 18 Optimizing Compilers for the SPARC Architecture
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    Chapter 19 Development Tools for RISC: An Array of Tools for SPARC Designs
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    Chapter 20 Sun’s SPARC Embedded Development Tools
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    Chapter 21 Software Considerations for Real-Time RISC
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    Chapter 22 SPARC for Real-Time Applications
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    Chapter 23 SunOS on SPARC
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    Chapter 24 SunOS Multi-Thread Architecture
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    Chapter 25 Understanding the Application Binary Interface
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    Chapter 26 SPARC Compliance Definition
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    Chapter 27 Concept To System: How Sun Microsystems Created SPARCstationl Using LSI Logic’s ASIC System Technology
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    Chapter 28 SBus Takes I/O Performance Into the ’90s
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    Chapter 29 SPARC MBus Overview
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    Chapter 30 Understanding MBus
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    Chapter 31 Licensing Strategy at Sun Microsystems
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    Chapter 32 An Analysis of MIPS and SPARC Instruction Set Utilization on the SPEC Benchmarks
Attention for Chapter 7: First 32-Bit SPARC-Based Processors Implemented in High-Speed CMOS
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Chapter title
First 32-Bit SPARC-Based Processors Implemented in High-Speed CMOS
Chapter number 7
Book title
The SPARC Technical Papers
Published in
Sun Technical Reference Library, December 1991
DOI 10.1007/978-1-4612-3192-9_7
Book ISBNs
978-0-387-97634-1, 978-1-4612-3192-9
Authors

Masood Namjoo

Editors

Ben J. Catanzaro

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Attention Score in Context

This research output has an Altmetric Attention Score of 1. This is our high-level measure of the quality and quantity of online attention that it has received. This Attention Score, as well as the ranking and number of research outputs shown below, was calculated when the research output was last mentioned on 27 December 2015.
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#23,324,704
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#1
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#60,889
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