You are seeing a free-to-access but limited selection of the activity Altmetric has collected about this research output.
Click here to find out more.
| Chapter title |
SystemVerilog Design Hierarchy
|
|---|---|
| Chapter number | 8 |
| Book title |
SystemVerilog For Design
|
| Published by |
Springer, Boston, MA, January 2004
|
| DOI | 10.1007/978-1-4757-6682-0_8 |
| Book ISBNs |
978-1-4757-6684-4, 978-1-4757-6682-0
|
| Authors |
Stuart Sutherland, Simon Davidmann, Peter Flake |