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High-Performance Computing Using FPGAs

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Cover of 'High-Performance Computing Using FPGAs'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 High-Performance Hardware Acceleration of Asset Simulations
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    Chapter 2 Monte-Carlo Simulation-Based Financial Computing on the Maxwell FPGA Parallel Machine
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    Chapter 3 Bioinformatics Applications on the FPGA-Based High-Performance Computer RIVYERA
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    Chapter 4 FPGA-Accelerated Molecular Dynamics
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    Chapter 5 FPGA-Based HPRC for Bioinformatics Applications
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    Chapter 6 High-Performance Computing for Neuroinformatics Using FPGA
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    Chapter 7 High-Performance FPGA-Accelerated Real-Time Search
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    Chapter 8 High-Performance Data Processing Over N -ary Trees
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    Chapter 9 FPGA-Based Systolic Computational-Memory Array for Scalable Stencil Computations
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    Chapter 10 High Performance Implementation of RTM Seismic Modeling on FPGAs: Architecture, Arithmetic and Power Issues
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    Chapter 11 High-Performance Cryptanalysis on RIVYERA and COPACOBANA Computing Systems
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    Chapter 12 FPGA-Based HPRC Systems for Scientific Applications
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    Chapter 13 Accelerating the SPICE Circuit Simulator Using an FPGA: A Case Study
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    Chapter 14 The Convey Hybrid-Core Architecture
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    Chapter 15 Low Cost High Performance Reconfigurable Computing
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    Chapter 16 An FPGA-Based Supercomputer for Statistical Physics: The Weird Case of Janus
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    Chapter 17 Accelerate Communication, not Computation!
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    Chapter 18 High-Speed Torus Interconnect Using FPGAs
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    Chapter 19 MEMSCALE: Re-architecting Memory Resources for Clusters
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    Chapter 20 High-Performance Computing Based on High-Speed Dynamic Reconfiguration
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    Chapter 21 Reconfigurable Arithmetic for High-Performance Computing
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    Chapter 22 Acceleration of the Discrete Element Method: From RTL to C-Based Design
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    Chapter 23 Optimising Euroben Kernels on Maxwell
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    Chapter 24 Assessing Productivity of High-Level Design Methodologies for High-Performance Reconfigurable Computers
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    Chapter 25 Maximum Performance Computing with Dataflow Engines
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    Chapter 26 Erratum: MEMSCALE: Re-architecting Memory Resources for Clusters
Attention for Chapter 26: Erratum: MEMSCALE: Re-architecting Memory Resources for Clusters
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Chapter title
Erratum: MEMSCALE: Re-architecting Memory Resources for Clusters
Chapter number 26
Book title
High-Performance Computing Using FPGAs
Published by
Springer, New York, NY, January 2013
DOI 10.1007/978-1-4614-1791-0_26
Book ISBNs
978-1-4614-1790-3, 978-1-4614-1791-0
Authors

Holger Frönin, Federico Silla, Hector Montaner, Frönin, Holger, Silla, Federico, Montaner, Hector