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Computer Aided Verification

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Cover of 'Computer Aided Verification'

Table of Contents

  1. Altmetric Badge
    Book Overview
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    Chapter 1 Policy Monitoring in First-Order Temporal Logic
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    Chapter 2 Retrofitting Legacy Code for Security
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    Chapter 3 Quantitative Information Flow: From Theory to Practice?
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    Chapter 4 Memory Management in Concurrent Algorithms
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    Chapter 5 ABC: An Academic Industrial-Strength Verification Tool
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    Chapter 6 There’s Plenty of Room at the Bottom: Analyzing and Verifying Machine Code
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    Chapter 7 Constraint Solving for Program Verification: Theory and Practice by Example
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    Chapter 8 Invariant Synthesis for Programs Manipulating Lists with Unbounded Data
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    Chapter 9 Termination Analysis with Compositional Transition Invariants
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    Chapter 10 Lazy Annotation for Program Testing and Verification
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    Chapter 11 The Static Driver Verifier Research Platform
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    Chapter 12 Dsolve: Safety Verification via Liquid Types
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    Chapter 13 Contessa: Concurrency Testing Augmented with Symbolic Analysis
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    Chapter 14 Simulation Subsumption in Ramsey-Based Büchi Automata Universality and Inclusion Testing
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    Chapter 15 Efficient Emptiness Check for Timed Büchi Automata
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    Chapter 16 Merit: An Interpolating Model-Checker
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    Chapter 17 Breach, A Toolbox for Verification and Parameter Synthesis of Hybrid Systems
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    Chapter 18 Jtlv: A Framework for Developing Verification Algorithms
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    Chapter 19 Petruchio: From Dynamic Networks to Nets
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    Chapter 20 Synthesis of Quantized Feedback Control Software for Discrete Time Linear Hybrid Systems
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    Chapter 21 Safety Verification for Probabilistic Hybrid Systems
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    Chapter 22 A Logical Product Approach to Zonotope Intersection
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    Chapter 23 Fast Acceleration of Ultimately Periodic Relations
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    Chapter 24 An Abstraction-Refinement Approach to Verification of Artificial Neural Networks
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    Chapter 25 Computer Aided Verification
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    Chapter 26 Generating Litmus Tests for Contrasting Memory Consistency Models
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    Chapter 27 Directed Proof Generation for Machine Code
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    Chapter 28 Verifying Low-Level Implementations of High-Level Datatypes
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    Chapter 29 Automatic Generation of Inductive Invariants from High-Level Microarchitectural Models of Communication Fabrics
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    Chapter 30 Efficient Reachability Analysis of Büchi Pushdown Systems for Hardware/Software Co-verification
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    Chapter 31 LTSmin: Distributed and Symbolic Reachability
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    Chapter 32 libalf: The Automata Learning Framework
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    Chapter 33 Symbolic Bounded Synthesis
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    Chapter 34 Measuring and Synthesizing Systems in Probabilistic Environments
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    Chapter 35 Achieving Distributed Control through Model Checking
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    Chapter 36 Robustness in the Presence of Liveness
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    Chapter 37 RATSY – A New Requirements Analysis Tool with Synthesis
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    Chapter 38 Comfusy: A Tool for Complete Functional Synthesis
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    Chapter 39 Universal Causality Graphs: A Precise Happens-Before Model for Detecting Bugs in Concurrent Programs
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    Chapter 40 Automatically Proving Linearizability
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    Chapter 41 Model Checking of Linearizability of Concurrent List Implementations
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    Chapter 42 Local Verification of Global Invariants in Concurrent Programs
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    Chapter 43 Abstract Analysis of Symbolic Executions
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    Chapter 44 Automated Assume-Guarantee Reasoning through Implicit Learning
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    Chapter 45 Learning Component Interfaces with May and Must Abstractions
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    Chapter 46 A Dash of Fairness for Compositional Reasoning
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    Chapter 47 SPLIT: A Compositional LTL Verifier
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    Chapter 48 A Model Checker for AADL
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    Chapter 49 PESSOA: A Tool for Embedded Controller Synthesis
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    Chapter 50 On Array Theory of Bounded Elements
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    Chapter 51 Quantifier Elimination by Lazy Model Enumeration
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    Chapter 52 Bounded Underapproximations
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    Chapter 53 Global Reachability in Bounded Phase Multi-stack Pushdown Systems
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    Chapter 54 Model-Checking Parameterized Concurrent Programs Using Linear Interfaces
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    Chapter 55 Dynamic Cutoff Detection in Parameterized Concurrent Programs
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    Chapter 56 PARAM: A Model Checker for Parametric Markov Models
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    Chapter 57 Gist: A Solver for Probabilistic Games
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    Chapter 58 A NuSMV Extension for Graded-CTL Model Checking
Attention for Chapter 5: ABC: An Academic Industrial-Strength Verification Tool
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Citations

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Chapter title
ABC: An Academic Industrial-Strength Verification Tool
Chapter number 5
Book title
Computer Aided Verification
Published by
Springer Berlin Heidelberg, January 2010
DOI 10.1007/978-3-642-14295-6_5
Book ISBNs
978-3-64-214294-9, 978-3-64-214295-6
Authors

Robert Brayton, Alan Mishchenko, Brayton, Robert, Mishchenko, Alan

Editors

Tayssir Touili, Byron Cook, Paul Jackson

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 102 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Canada 2 2%
United States 1 <1%
Germany 1 <1%
Italy 1 <1%
Unknown 97 95%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 29 28%
Student > Master 20 20%
Researcher 10 10%
Student > Doctoral Student 6 6%
Student > Bachelor 4 4%
Other 8 8%
Unknown 25 25%
Readers by discipline Count As %
Computer Science 52 51%
Engineering 19 19%
Mathematics 1 <1%
Environmental Science 1 <1%
Chemistry 1 <1%
Other 1 <1%
Unknown 27 26%