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Mendeley readers
Chapter title |
Leakage Reduction at the Architectural Level and Its Application to 16 Bit Multiplier Architectures
|
---|---|
Chapter number | 19 |
Book title |
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
|
Published by |
Springer, Berlin, Heidelberg, September 2004
|
DOI | 10.1007/978-3-540-30205-6_19 |
Book ISBNs |
978-3-54-023095-3, 978-3-54-030205-6
|
Authors |
Christian Schuster, Jean-Luc Nagel, Christian Piguet, Pierre-André Farine |
Mendeley readers
The data shown below were compiled from readership statistics for 4 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
Country | Count | As % |
---|---|---|
Australia | 1 | 25% |
Unknown | 3 | 75% |
Demographic breakdown
Readers by professional status | Count | As % |
---|---|---|
Student > Ph. D. Student | 3 | 75% |
Researcher | 1 | 25% |
Readers by discipline | Count | As % |
---|---|---|
Engineering | 3 | 75% |
Psychology | 1 | 25% |