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VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability

Overview of attention for book
Attention for Chapter 6: Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings
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Chapter title
Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings
Chapter number 6
Book title
VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability
Published by
Springer, Cham, September 2016
DOI 10.1007/978-3-319-67104-8_6
Book ISBNs
978-3-31-967103-1, 978-3-31-967104-8
Authors

Guillaume Plassan, Hans-Jörg Peter, Katell Morin-Allory, Shaker Sarwary, Dominique Borrione

Mendeley readers

The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 1 100%

Demographic breakdown

Readers by professional status Count As %
Other 1 100%
Readers by discipline Count As %
Arts and Humanities 1 100%