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VLSI-SoC: Research Trends in VLSI and Systems on Chip

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Cover of 'VLSI-SoC: Research Trends in VLSI and Systems on Chip'

Table of Contents

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    Book Overview
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    Chapter 1 Architectures for High Dynamic Range, High Speed Image Sensor Readout Circuits
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    Chapter 2 Oversampled Time Estimation Techniques for Precision Photonic Detectors
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    Chapter 3 Innovative Optoeletronic Approaches to Biomolecular Analysis with Arrays of Silicon Devices
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    Chapter 4 Electronic Detection of DNA Adsorption and Hybridization
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    Chapter 5 Probabilistic amp; Statistical Design—the Wave of the Future
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    Chapter 6 A CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs
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    Chapter 7 Probabilistic Design: A Survey of Probabilistic CMOS Technology and Future Directions for Terascale IC Design
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    Chapter 8 Reliability Issues in Deep Deep Submicron Technologies: Time-Dependent Variability and its Impact on Embedded System Design
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    Chapter 9 Soft Error Resilient System Design through Error Correction
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    Chapter 10 Library Compatible Variational Delay Computation
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    Chapter 11 A Power-Efficient Methodology for Mapping Applications on Multi-Processor, System-on-Chip Architectures
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    Chapter 12 Frequency and Speed Setting for Energy Conservation in Autonomous Mobile Robots
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    Chapter 13 Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation
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    Chapter 14 Logic Synthesis of EXOR Projected Sum of Products
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    Chapter 15 A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits
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    Chapter 16 CAT Platform for Analogue and Mixed-Signal Test Evaluation and Optimization
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    Chapter 17 Broadside Transition Test Generation for Partial Scan Circuits through Stuck-at Test Generation
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    Chapter 18 Comparison of an Æthereal Network on Chip and Traditional Interconnects - Two Case Studies
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    Chapter 19 Designing Routing and Message-Dependent Deadlock Free Networks on Chips
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    Chapter 20 Dynamic Reconfigurable Architecture Exploration based on Parameterized Reconfigurable Processor Model
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    Chapter 21 Human++: Emerging Technology for Body Area Networks
Attention for Chapter 11: A Power-Efficient Methodology for Mapping Applications on Multi-Processor, System-on-Chip Architectures
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Citations

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Chapter title
A Power-Efficient Methodology for Mapping Applications on Multi-Processor, System-on-Chip Architectures
Chapter number 11
Book title
VLSI-SoC: Research Trends in VLSI and Systems on Chip
Published by
Springer, Boston, MA, January 2008
DOI 10.1007/978-0-387-74909-9_11
Book ISBNs
978-0-387-74908-2, 978-0-387-74909-9
Authors

Giovanni Beltrame, Donatella Sciuto, Christina Silvano, Beltrame, Giovanni, Sciuto, Donatella, Silvano, Christina

View on publisher site
Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 7 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Canada 1 14%
Unknown 6 86%

Demographic breakdown

Readers by professional status Count As %
Professor 3 43%
Student > Ph. D. Student 2 29%
Professor > Associate Professor 1 14%
Student > Master 1 14%
Readers by discipline Count As %
Computer Science 5 71%
Engineering 2 29%

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