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Power-Aware Computer Systems

Overview of attention for book
Cover of 'Power-Aware Computer Systems'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors
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    Chapter 2 Ramp Up/Down Functional Unit to Reduce Step Power
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    Chapter 3 An Adaptive Issue Queue for Reduced Power at High Performance
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    Chapter 4 Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform
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    Chapter 5 Exploiting Content Variation and Perception in Power-Aware 3D Graphics Rendering
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    Chapter 6 Compiler-Directed Dynamic Frequency and Voltage Scheduling
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    Chapter 7 Cache-Line Decay: A Mechanism to Reduce Cache Leakage Power
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    Chapter 8 Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
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    Chapter 9 TEM 2 P 2 EST: A Thermal Enabled Multi-model Power/Performance ESTimator
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    Chapter 10 Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor
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    Chapter 11 A Comparison of Two Architectural Power Models
Attention for Chapter 11: A Comparison of Two Architectural Power Models
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7 Mendeley
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Chapter title
A Comparison of Two Architectural Power Models
Chapter number 11
Book title
Power-Aware Computer Systems
Published by
Springer, Berlin, Heidelberg, November 2000
DOI 10.1007/3-540-44572-2_11
Book ISBNs
978-3-54-042329-4, 978-3-54-044572-2
Authors

Soraya Ghiasi, Dirk Grunwald

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Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 7 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 7 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 4 57%
Researcher 2 29%
Unknown 1 14%
Readers by discipline Count As %
Engineering 3 43%
Computer Science 2 29%
Earth and Planetary Sciences 1 14%
Unknown 1 14%

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